6-3 file number 2791.10 note: the design of the SP720 scr/diode esd protection arrays is covered by littelfuse patent 4567500. 1-800-999-9445 or 1-847-824-1188 | copyright littelfuse, inc. 1998 SP720 electronic protection array for esd and over-voltage protection the SP720 is an array of scr/diode bipolar structures for esd and over-voltage protection to sensitive input circuits. the SP720 has 2 protection scr/diode device structures per input. a total of 14 available inputs can be used to protect up to 14 external signal or bus lines. over-voltage protection is from the in (pins 1-7 and 9-15) to v+ or v-. the scr structures are designed for fast triggering at a threshold of one +v be diode threshold above v+ (pin 16) or a -v be diode threshold below v- (pin 8). from an in input, a clamp to v+ is activated if a transient pulse causes the input to be increased to a voltage level greater than one v be above v+. a similar clamp to v- is activated if a negative pulse, one v be less than v-, is applied to an in input. standard esd human body model (hbm) capability is: refer to figure 1 and table 1 for further detail. refer to application note an9304 and an9612 for additional information. pinout SP720 (pdip, soic) top view features esd interface capability for hbm standards - mil std 3015.7 . . . . . . . . . . . . . . . . . . . . . . . . . . .15kv - iec 1000-4-2, direct discharge, single input. . . . . . . . . . . . . . . . . . . . . . . . 4kv (level 2) two inputs in parallel . . . . . . . . . . . . . . . . 8kv (level 4) - iec 1000-4-2, air discharge. . . . . . . . . . 15kv (level 4) high peak current capability - iec 1000-4-5 (8/20 s) . . . . . . . . . . . . . . . . . . . . . . 3a - single pulse, 100 s pulse width . . . . . . . . . . . . . . 2a - single pulse, 4 s pulse width . . . . . . . . . . . . . . . . 5a designed to provide over-voltage protection - single-ended voltage range to . . . . . . . . . . . . . . .+30v - differential voltage range to . . . . . . . . . . . . . . . . 15v fast switching . . . . . . . . . . . . . . . . . . . . . . . 2ns risetime low input leakages . . . . . . . . . . . . . . . 1na at 25 o c (typ) low input capacitance. . . . . . . . . . . . . . . . . . . . 3pf (typ) an array of 14 scr/diode pairs operating temperature range . . . . . . . . . -40 o c to 105 o c applications microprocessor/logic input protection data bus protection analog device input protection voltage clamp functional block diagram hbm standard mode r c esd (v) iec 1000-4-2 air 330 ? 150pf >15kv direct 330 ? 150pf >4kv direct, dual pins 330 ? 150pf >8kv mil-std-3015.7 direct, in-circuit 1.5k ? 100pf >15kv ordering information part no. temp. range ( o c) package pkg. no. SP720ap -40 to 105 16 ld pdip e16.3 SP720ab -40 to 105 16 ld soic m16.15 SP720abt -40 to 105 16 ld soic tape and reel m16.15 14 15 16 9 13 12 11 10 1 2 3 4 5 7 6 8 in in in in in in v- in v+ in in in in in in in v+ 16 1 8 2 3 - 7 9 - 15 in in in v- data sheet january 1998 [ /title (SP720 ) /sub- ject (elec- tronic protec- tion array for esd and over- volt- age protec- tion) /autho r () /key- words (tvs, tran- sient sup- pres- sion, protec- tion, esd, iec, emc, elec- tro- magnet ic com-
6-4 esd capability esd capability is dependent on the application and de?ed test standard. the evaluation results for various test standards and methods based on figure 1 are shown in table 1. for the ?odified?mil-std-3015.7 condition that is defined as an ?n-circuit?method of esd testing, the v+ and v- pins have a return path to ground and the SP720 esd capability is typically greater than 15kv from 100pf through 1.5k ? . by strict definition of mil-std-3015.7 using ?in-to-pin?device testing, the esd voltage capability is greater than 6kv. the mil-std-3015.7 results were determined from at&t esd test lab measurements. the hbm capability to the iec 1000-4-2 standard is greater than 15kv for air discharge (level 4) and greater than 4kv for direct discharge (level 2). dual pin capability (2 adjacent pins in parallel) is well in excess of 8kv (level 4). for esd testing of the SP720 to eiaj ic121 machine model (mm) standard, the results are typically better than 1kv from 200pf with no series resistance. absolute maximum ratings thermal information continuous supply voltage, (v+) - (v-) . . . . . . . . . . . . . . . . . . +35v forward peak current, i in to v cc , i in to gnd (refer to figure 6) . . . . . . . . . . . . . . . . . . . . . . . . . . . 2a, 100 s esd ratings and capability (figure 1, table 1) load dump and reverse battery (note 2) thermal resistance (typical, note 1) . . . . . . . . . . . . . ja ( o c/w) pdip package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 90 soic package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 130 maximum storage temperature range . . . . . . . . . . -65 o c to 150 o c maximum junction temperature (plastic package) . . . . . . . . .150 o c maximum lead temperature (soldering 10s) . . . . . . . . . . . . .300 o c (soic lead tips only) caution: stresses above those listed in ?bsolute maximum ratings may cause permanent damage to the device. this is a stress o nly rating and operation of the device at these or any other conditions above those indicated in the operational sections of this speci?ation is not implied. note: 1. ja is measured with the component mounted on an evaluation pc board in free air. electrical speci?ations t a = -40 o c to 105 o c; v in = 0.5v cc , unless otherwise speci?d parameter symbol test conditions min typ max units operating voltage range, v supply = [(v+) - (v-)] v supply - 2 to 30 - v forward voltage drop: in to v- in to v+ v fwdl v fwdh i in = 1a (peak pulse) - - 2 2 - - v v input leakage current i in -20 5 20 na quiescent supply current i quiescent - 50 200 na equivalent scr on threshold note 3 - 1.1 - v equivalent scr on resistance v fwd /i fwd ; note 3 - 1 - ? input capacitance c in -3-pf input switching speed t on -2-ns notes: 2. in automotive and battery operated systems, the power supply lines should be externally protected for load dump and reverse b attery. when the v+ and v- pins are connected to the same supply voltage source as the device or control line under protection, a current limiti ng resistor should be connected in series between the external supply and the SP720 supply pins to limit reverse battery current to within the rat ed maximum limits. bypass capacitors of typically 0.01 f or larger from the v+ and v- pins to ground are recommended. 3. refer to the figure 3 graph for definitions of equivalent ?cr on threshold?and ?cr on resistance.?these characteristics a re given here for thumb-rule information to determine peak current and dissipation under eos conditions. table 1. esd test conditions standard type/mode r d c d v d mil std 3015.7 modified hbm 1.5k ? 100pf 15kv standard hbm 1.5k ? 100pf 6kv iec 1000-4-2 hbm, air discharge 330 ? 150pf 15kv hbm, direct discharge 330 ? 150pf 4kv hbm, direct discharge, two parallel input pins 330 ? 150pf 8kv eiaj ic121 machine model 0k ? 200pf 1kv h.v. supply v d in dut c d r 1 iec 1000-4-2: r 1 50 to 100m ? r d charge switch discharge switch mil std 3015.7: r 1 1 to 10m ? figure 1. electrostatic discharge test SP720
6-5 figure 2. low current scr forward voltage drop curve figure 3. high current scr forward voltage drop curve figure 4. typical application of the SP720 as an input clamp for over-voltage, greater than 1v be above v+ or less than -1v be below v- 600 800 1000 1200 forward scr voltage drop (mv) 100 80 60 40 20 0 forward scr current (ma) t a = 25 o c single pulse 2.5 2 1.5 1 0.5 0 forward scr current (a) t a = 25 o c single pulse v fwd i fwd 01 23 forward scr voltage drop (v) equiv. sat. on threshold ~ 1.1v +v cc +v cc input drivers protection circuit (1 of 14 on chip) SP720 input or signal sources in 9-15 in 1-7 SP720 v- to +v cc linear or digital ic interface v+ SP720
6-6 peak transient current capability of the SP720 the peak transient current capability rises sharply as the width of the current pulse narrows. destructive testing was done to fully evaluate the SP720 |